Fernando Sahmkow
094fa9ec6c
Shader_IR: Clang format
2019-10-25 09:01:32 -04:00
ReinUsesLisp
c37c37d4a2
gl_shader_disk_cache: Store and load fast BRX
2019-10-25 09:01:31 -04:00
Fernando Sahmkow
4168b287c9
Shader_IR: allow lookup of texture samplers within the shader_ir for instructions that don't provide it
2019-10-25 09:01:30 -04:00
Fernando Sahmkow
d4da704ac5
VideoCore: Unify const buffer accessing along engines and provide ConstBufferLocker class to shaders.
2019-10-25 09:01:29 -04:00
Lioncash
f1443d2b41
shader_bytecode: Make Matcher constexpr capable
...
Greatly shrinks the amount of generated code for GetDecodeTable().
Collapses an assembly output of 9000+ lines down to ~3621 with Clang,
and 6513 down to ~2616 with GCC, given it's now allowed to construct all
the entries as a sequence of constant data.
2019-10-24 01:10:10 -04:00
ReinUsesLisp
94d32c3cd2
maxwell_3d: Reduce FlushMMEInlineDraw logging to Trace
2019-10-20 03:43:17 -03:00
Fernando Sahmkow
9dc2027153
Fermi2D: Use a different formula for delimiting blit areas.
2019-10-17 18:21:01 -04:00
Fernando Sahmkow
ea7b91dbf9
Fermi2D: limit blit area to only available area
...
Normaly OpenGL does not care if the areas exceed the texture regions but
other backends such as Vulkan do care about the limits of this areas.
This PR crops the areas of the blit in order that they don't surpass the
limits of the textures. This should help Vulkan and faulty OpenGL
drivers
2019-10-17 10:38:44 -04:00
Lioncash
0b0ac56219
maxwell_3d: Silence truncation warnings
...
A trivial warning caused by not using size_t as the argument types
instead of u32.
2019-10-15 17:51:35 -04:00
ReinUsesLisp
521b03ddb4
maxwell_3d: Add dirty flags for depth bounds values
...
This is useful in Vulkan where we want to update depth bounds without
caring if it's enabled or disabled through vkCmdSetDepthBounds.
2019-10-05 04:07:47 +00:00
bunnei
6deb6d2b10
Merge pull request #2869 from ReinUsesLisp/suld
...
shader/image: Implement SULD and fix SUATOM
2019-09-23 21:47:03 -04:00
David
cc451e4435
Merge pull request #2870 from FernandoS27/multi-draw
...
Implement a MME Draw commands Inliner and correct host instance drawing
2019-09-22 23:13:02 +10:00
Fernando Sahmkow
d53d764965
Maxwell3D: Corrections and refactors to MME instance refactor
2019-09-22 07:23:13 -04:00
FearlessTobi
97f509e9d4
Fix clang-format
2019-09-22 02:21:56 +02:00
FearlessTobi
4c1c09c8d8
fermi_2d: Lower surface copy log severity to DEBUG
2019-09-22 02:18:57 +02:00
Rodrigo Locatti
e33b9e3e6f
Merge pull request #2878 from FernandoS27/icmp
...
shader_ir: Implement ICMP
2019-09-21 18:06:07 -03:00
ReinUsesLisp
79a7463f4c
gl_shader_decompiler: Use uint for images and fix SUATOM
...
In the process remove implementation of SUATOM.MIN and SUATOM.MAX as
these require a distinction between U32 and S32. These have to be
implemented with imageCompSwap loop.
2019-09-21 17:33:52 -03:00
ReinUsesLisp
331d140bb4
shader/image: Implement SULD and remove irrelevant code
...
* Implement SULD as float.
* Remove conditional declaration of GL_ARB_shader_viewport_layer_array.
2019-09-21 17:32:48 -03:00
ReinUsesLisp
dfe69a7f19
shader_bytecode: Add SULD encoding
2019-09-21 17:31:46 -03:00
Fernando Sahmkow
f02b9d37f0
Shader_IR: ICMP corrections and fixes
2019-09-21 14:28:03 -04:00
David Marcec
5bcd512c3c
Mark DrawArrays as LOG_TRACE
...
There's no reason to clog logs with DrawArray.
2019-09-21 15:43:58 +10:00
Fernando Sahmkow
01b8a78a8a
Shader_IR: Implement ICMP.
2019-09-19 20:56:29 -04:00
Fernando Sahmkow
ab61f800b6
Rasterizer: Refactor and simplify DrawBatch Interface.
2019-09-19 11:41:33 -04:00
Fernando Sahmkow
ae03b1ebc7
VideoCore: Corrections to the MME Inliner and removal of hacky instance management.
2019-09-19 11:41:29 -04:00
Fernando Sahmkow
b61203a547
Video Core: initial Implementation of InstanceDraw Packaging
2019-09-19 11:41:27 -04:00
ReinUsesLisp
42815d1d24
shader_ir/warp: Implement SHFL
2019-09-17 17:44:07 -03:00
Fernando Sahmkow
afcd6355ff
Merge pull request #2851 from ReinUsesLisp/srgb
...
renderer_opengl: Fix sRGB blits
2019-09-15 10:38:10 -04:00
Fernando Sahmkow
71164f2b3e
Merge pull request #2824 from ReinUsesLisp/mme
...
Revert "Revert #2466 " and stub FirmwareCall 4
2019-09-15 06:17:04 -04:00
Rodrigo Locatti
a5f0cbb0f1
maxwell_3d: Update firmware 4 call stub commentary
2019-09-14 22:51:18 -03:00
ReinUsesLisp
2e6bebb3d2
shader/image: Implement SUATOM and fix SUST
2019-09-10 20:22:31 -03:00
ReinUsesLisp
3e5e983799
renderer_opengl: Fix sRGB blits
...
Removes the sRGB hack of tracking if a frame used an sRGB rendertarget
to apply at least once to blit the final texture as sRGB. Instead of
doing this apply sRGB if the presented image has sRGB.
Also enable sRGB by default on Maxwell3D registers as some games seem to
assume this.
2019-09-10 19:31:42 -03:00
bunnei
497302dff2
Merge pull request #2823 from ReinUsesLisp/shr-clamp
...
shader/shift: Implement SHR wrapped and clamped variants
2019-09-10 11:56:17 -04:00
bunnei
2182f25e29
Merge pull request #2810 from ReinUsesLisp/mme-opt
...
maxwell_3d: Avoid moving macro_params
2019-09-10 11:55:45 -04:00
ReinUsesLisp
0c8851163d
gl_rasterizer: Implement image bindings
2019-09-05 20:35:51 -03:00
ReinUsesLisp
9fb31b1b23
kepler_compute: Implement texture queries
2019-09-05 20:35:51 -03:00
ReinUsesLisp
4f0213d0c7
Revert "Revert #2466 " and stub FirmwareCall 4
2019-09-04 01:55:45 -03:00
ReinUsesLisp
9b001821d9
shader/shift: Implement SHR wrapped and clamped variants
...
Nvidia defaults to wrapped shifts, but this is undefined behaviour on
OpenGL's spec. Explicitly mask/clamp according to what the guest shader
requires.
2019-09-04 01:55:24 -03:00
ReinUsesLisp
9ad95eb74a
maxwell_3d: Avoid moving macro_params
2019-09-04 01:55:01 -03:00
bunnei
3df0f440fd
Merge pull request #2812 from ReinUsesLisp/f2i-selector
...
shader_ir/conversion: Implement F2I and F2F F16 selector
2019-09-03 22:35:33 -04:00
bunnei
4ae7f81090
Merge pull request #2811 from ReinUsesLisp/fsetp-fix
...
float_set_predicate: Add missing negation bit for the second operand
2019-09-03 22:34:34 -04:00
bunnei
93263ae79c
Merge pull request #2826 from ReinUsesLisp/macro-binding
...
maxwell_3d: Fix macro binding cursor
2019-09-03 22:32:42 -04:00
bunnei
83ac6b9f38
Merge pull request #2765 from FernandoS27/dma-fix
...
MaxwellDMA: Fixes, corrections and relaxations.
2019-09-01 13:13:05 -04:00
ReinUsesLisp
95df43ec32
maxwell_3d: Fix macro binding cursor
2019-09-01 05:01:11 -03:00
Rodrigo Locatti
598157a8c9
video_core: Silent miscellaneous warnings ( #2820 )
...
* texture_cache/surface_params: Remove unused local variable
* rasterizer_interface: Add missing documentation commentary
* maxwell_dma: Remove unused rasterizer reference
* video_core/gpu: Sort member declaration order to silent -Wreorder warning
* fermi_2d: Remove unused MemoryManager reference
* video_core: Silent unused variable warnings
* buffer_cache: Silent -Wreorder warnings
* kepler_memory: Remove unused MemoryManager reference
* gl_texture_cache: Add missing override
* buffer_cache: Add missing include
* shader/decode: Remove unused variables
2019-08-30 14:08:00 -04:00
ReinUsesLisp
6f134adf2a
shader_ir/conversion: Split int and float selector and implement F2F H1
2019-08-28 16:09:33 -03:00
ReinUsesLisp
d9ad389777
shader_ir/conversion: Implement F2I F16 Ra.H1
2019-08-27 23:40:40 -03:00
ReinUsesLisp
d490cc5285
float_set_predicate: Add missing negation bit for the second operand
2019-08-27 21:57:43 -03:00
ReinUsesLisp
67f47b2f6a
shader_ir: Implement VOTE
...
Implement VOTE using Nvidia's intrinsics. Documentation about these can
be found here
https://developer.nvidia.com/reading-between-threads-shader-intrinsics
Instead of using portable ARB instructions I opted to use Nvidia
intrinsics because these are the closest we have to how Tegra X1
hardware renders.
To stub VOTE on non-Nvidia drivers (including nouveau) this commit
simulates a GPU with a warp size of one, returning what is meaningful
for the instruction being emulated:
* anyThreadNV(value) -> value
* allThreadsNV(value) -> value
* allThreadsEqualNV(value) -> true
ballotARB, also known as "uint64_t(activeThreadsNV())", emits
VOTE.ANY Rd, PT, PT;
on nouveau's compiler. This doesn't match exactly to Nvidia's code
VOTE.ALL Rd, PT, PT;
Which is emulated with activeThreadsNV() by this commit. In theory this
shouldn't really matter since .ANY, .ALL and .EQ affect the predicates
(set to PT on those cases) and not the registers.
2019-08-21 14:50:38 -03:00
bunnei
0d754d7a75
Merge pull request #2753 from FernandoS27/float-convert
...
Shader_Ir: Implement F16 Variants of F2F, F2I, I2F.
2019-08-21 10:27:57 -04:00
ReinUsesLisp
b6272eb8e2
shader_ir: Implement NOP
2019-08-04 03:02:55 -03:00