Commit graph

151 commits

Author SHA1 Message Date
bunnei
db342cc6f0 arm: arm_dynarmic: Skip calls when JIT is invalid.
- This can happen if called from an idle or suspension thread.
2021-01-28 21:42:25 -08:00
ReinUsesLisp
53cf598783 core: Silence unhandled enum in switch warnings 2021-01-08 23:21:07 -03:00
MerryMage
c535205f1c dynarmic: Add Unsafe_InaccurateNaN optimization 2021-01-02 20:13:21 +00:00
ReinUsesLisp
8bfa4d6dbf core/memory: Read and write page table atomically
Squash attributes into the pointer's integer, making them an uintptr_t
pair containing 2 bits at the bottom and then the pointer. These bits
are currently unused thanks to alignment requirements.

Configure Dynarmic to mask out these bits on pointer reads.

While we are at it, remove some unused attributes carried over from
Citra.

Read/Write and other hot functions use a two step unpacking process that
is less readable to stop MSVC from emitting an extra AND instruction in
the hot path:

 mov         rdi,rcx
 shr         rdx,0Ch
 mov         r8,qword ptr [rax+8]
 mov         rax,qword ptr [r8+rdx*8]
 mov         rdx,rax
-and         al,3
 and         rdx,0FFFFFFFFFFFFFFFCh
 je          Core::Memory::Memory::Impl::Read<unsigned char>
 mov         rax,qword ptr [vaddr]
 movzx       eax,byte ptr [rdx+rax]
2020-12-29 21:54:49 -03:00
bunnei
039844bbb9 hle: kernel: Rewrite scheduler implementation based on Mesopshere. 2020-12-06 00:03:24 -08:00
bunnei
abc079aca1 hle: kernel: physical_core: Clear exclusive state after each run.
- This is closer to pre-multicore behavior, and works a bit better.
2020-12-06 00:03:24 -08:00
bunnei
a5b73195c9 core: arm: Implement InvalidateCacheRange for CPU cache invalidation. 2020-11-29 01:31:52 -08:00
bunnei
aaffe73f47 hle: kernel: multicore: Replace n-JITs impl. with 4 JITs. 2020-11-29 01:31:51 -08:00
Lioncash
c06510376a core: Eliminate remaining usages of the global system instance
Removes all remaining usages of the global system instance. After this,
migration can begin to migrate to being constructed and managed entirely
by the various frontends.
2020-11-27 11:40:45 -05:00
Lioncash
5c55f3b585 core: Remove usage of unicorn
Unicorn long-since lost most of its use, due to dynarmic gaining support
for handling most instructions. At this point any further issues
encountered should be used to make dynarmic better.

This also allows us to remove our dependency on Python.
2020-11-03 20:22:05 -05:00
bunnei
deb3536936 Revert "core: Fix clang build" 2020-10-20 19:07:39 -07:00
Lioncash
18636013c9 core: Fix clang build
Recent changes to the build system that made more warnings be flagged as
errors caused building via clang to break.

Fixes #4795
2020-10-17 19:50:39 -04:00
Lioncash
e457001dce General: Make use of std::nullopt where applicable
Allows some implementations to avoid completely zeroing out the internal
buffer of the optional, and instead only set the validity byte within
the structure.

This also makes it consistent how we return empty optionals.
2020-09-22 17:32:33 -04:00
Lioncash
4d0fa3544f arm_dynarmic_cp15: Initialize member variables
Ensures that the member variables are always initialized to a
deterministic value on creation.
2020-09-17 13:03:49 -04:00
MerryMage
1057908c3a dynarmic: Add unsafe optimizations 2020-08-16 14:15:39 +01:00
MerryMage
f82bbf743c configure_cpu: Show/Hide debugging options 2020-07-11 16:38:38 +01:00
MerryMage
79dfd272a9 configuration: Add settings to enable/disable specific CPU optimizations 2020-07-11 14:34:09 +01:00
Fernando Sahmkow
94a51e6b21 Core/Common: Address Feedback. 2020-06-27 18:20:06 -04:00
Fernando Sahmkow
8cd81eb66f SVC: Implement 32-bits wrappers and update Dynarmic. 2020-06-27 11:36:27 -04:00
Fernando Sahmkow
fd631d72a6 ARM: Update Dynarmic and Setup A32 according to latest interface. 2020-06-27 11:36:26 -04:00
Fernando Sahmkow
a7be2fac83 ArmDynarmic32: Setup CNTPCT correctly 2020-06-27 11:36:24 -04:00
Fernando Sahmkow
af0999c735 ARMDynarmicInterface: Correct GCC Build Errors. 2020-06-27 11:36:17 -04:00
Fernando Sahmkow
6cbdb64f3d ARMInterface/Externals: Update dynarmic and fit to latest version. 2020-06-27 11:36:13 -04:00
Fernando Sahmkow
cce90e2672 ARMInterface: Correct rebase errors. 2020-06-27 11:36:12 -04:00
Fernando Sahmkow
b5f7040175 Dynarmic Interface: don't clear cache if JIT has not been created. 2020-06-27 11:36:08 -04:00
Fernando Sahmkow
6f0c873d48 General: Cleanup legacy code. 2020-06-27 11:36:05 -04:00
Fernando Sahmkow
f0f2fc4243 SingleCore: Use Cycle Timing instead of Host Timing. 2020-06-27 11:36:01 -04:00
Fernando Sahmkow
db60ca2704 General: Move ARM_Interface into Threads. 2020-06-27 11:35:58 -04:00
Fernando Sahmkow
7b3b33a2e6 Core: Refactor ARM Interface. 2020-06-27 11:35:56 -04:00
Fernando Sahmkow
1cc7c426df X64 Clock: Reduce accuracy to be less or equal to guest accuracy. 2020-06-27 11:35:55 -04:00
Fernando Sahmkow
96c996b6a0 SVC/ARM: Correct svcSendSyncRequest and cache ticks on arm interface. 2020-06-27 11:35:53 -04:00
Fernando Sahmkow
fc47857c3b ARM: Addapt to new Exclusive Monitor Interface. 2020-06-27 11:35:50 -04:00
Fernando Sahmkow
b121009e03 General: Fix microprofile on dynarmic/svc, fix wait tree showing which threads were running. 2020-06-27 11:35:48 -04:00
Fernando Sahmkow
5eac520ae3 ARM/Memory: Correct Exclusive Monitor and Implement Exclusive Memory Writes. 2020-06-27 11:35:37 -04:00
Fernando Sahmkow
c8e62451c6 Core: Correct rebase. 2020-06-27 11:35:29 -04:00
Fernando Sahmkow
7ee76003ad General: Recover Prometheus project from harddrive failure
This commit: Implements CPU Interrupts, Replaces Cycle Timing for Host 
Timing, Reworks the Kernel's Scheduler, Introduce Idle State and 
Suspended State, Recreates the bootmanager, Initializes Multicore 
system.
2020-06-27 11:35:06 -04:00
Morph
75e120056f arm_dynarmic_64: Log the instruction when an exception is raised 2020-06-22 07:00:24 -04:00
Morph
393197f37c arm_dynarmic_32: Log under Core_ARM instead of HW_GPU 2020-06-22 06:59:41 -04:00
ReinUsesLisp
a0cbf4f4e8 arm_dynarmic_32: Fix implicit conversion error in SetTPIDR_EL0
On MSVC builds we treat conversion warnings as errors.
2020-06-18 16:52:15 -03:00
MerryMage
8055a71e00 arm_dynarmic_cp15: Implement CNTPCT 2020-06-17 17:10:24 +01:00
MerryMage
0ac9600204 arm_dynarmic_cp15: Update CP15 2020-06-17 17:10:24 +01:00
MerryMage
fc1c12b2c9 arm_dynarmic_32: InterpreterFallback should never happen 2020-06-17 17:10:24 +01:00
Lioncash
dca9c90af3 physical_core: Make use of std::make_unique instead of std::make_shared in ctor
We can also allow unicorn to be constructed in 32-bit mode or 64-bit
mode to satisfy the need for both interpreter instances.

Allows this code to compile successfully of non x86-64 architectures.
2020-04-24 00:20:58 -04:00
MerryMage
0bbafff3db dynarmic: Add option to disable CPU JIT optimizations 2020-04-20 13:36:26 +01:00
bunnei
a7b2390b73 dynarmic: Enable strict alignment checks.
- Also add a missing include.
2020-04-17 00:59:29 -04:00
bunnei
5b9e69e7fe core: memory: Move to Core::Memory namespace.
- helpful to disambiguate Kernel::Memory namespace.
2020-04-17 00:59:28 -04:00
bunnei
ed940661a8 core: kernel: Move SVC to its own namesapce. 2020-04-17 00:59:28 -04:00
bunnei
048ac77adc core: Implement separate A32/A64 ARM interfaces. 2020-03-02 21:51:57 -05:00
bunnei
9137455d86 core: dynarmic: Add CP15 from Citra. 2020-03-02 21:43:15 -05:00
Fernando Sahmkow
2f55c11a35 ARM_Interface: Cache the JITs instead of deleting/recreating.
This was a bug inherited from citra which was fixed by then at some 
time. This commit corrects such bug and ensures JITs are correctly 
recycled.
2020-02-26 15:53:47 -04:00