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999 commits

Author SHA1 Message Date
bunnei
c2a48352ad renderer_opengl: Better handling of framebuffer transform flags. 2018-03-23 14:58:27 -04:00
bunnei
fce77a1fb1 renderer_opengl: Use accelerated framebuffer load with LoadFBToScreenInfo. 2018-03-22 23:28:37 -04:00
bunnei
855aadf055 gl_rasterizer: Implement AccelerateDisplay method from Citra. 2018-03-22 23:06:54 -04:00
bunnei
95dec6140b LoadGLBuffer: Use bytes_per_pixel, not bits. 2018-03-22 23:01:57 -04:00
bunnei
7b167a12ad gl_rasterizer_cache: LoadGLBuffer should do a morton copy. 2018-03-22 22:54:04 -04:00
bunnei
875215fae4 video_core: Move MortonCopyPixels128 to utils header. 2018-03-22 22:52:40 -04:00
bunnei
4e4e999c4a video_core: Remove usage of PAddr and replace with VAddr. 2018-03-22 21:13:46 -04:00
bunnei
6babc57354 video_core: Move FramebufferInfo to FramebufferConfig in GPU. 2018-03-22 21:04:30 -04:00
bunnei
8c5ed9de77 gl_rasterizer: Replace a bunch of UNIMPLEMENTED with ASSERT. 2018-03-22 20:19:34 -04:00
bunnei
3ea48b01d3 gl_rasterizer: Add a simple passthrough shader in lieu of shader generation. 2018-03-22 20:00:41 -04:00
bunnei
8286b237cc gpu: Expose Maxwell3D engine. 2018-03-22 19:48:20 -04:00
bunnei
fcddbe6027 maxwell_3d: Add some format decodings and string helper functions. 2018-03-22 19:47:28 -04:00
bunnei
c388741f12 renderer: Create rasterizer and cleanup. 2018-03-22 19:46:37 -04:00
Subv
f3a5328f09 GPU: Added vertex attribute format registers. 2018-03-21 09:26:47 -05:00
Subv
a569ee8a58 GPU: Added registers for the number of vertices to render. 2018-03-20 23:28:06 -05:00
bunnei
766c6de88d Merge pull request #254 from bunnei/port-citra-renderer 
Port Citra OpenGL rasterizer code
 2018-03-20 21:37:43 -04:00
bunnei
188a685e73 renderer_gl: Port boilerplate rasterizer code over from Citra. 2018-03-20 00:07:32 -04:00
bunnei
e0f3facd01 gl_shader_util: Sync latest version with Citra. 2018-03-20 00:07:31 -04:00
bunnei
756e14027a renderer_gl: Port over gl_shader_gen module from Citra. 2018-03-20 00:07:30 -04:00
Mat M
9b5ae0daf5 Merge pull request #253 from Subv/rt_depth 
GPU: Added registers for color and Z buffers.
 2018-03-19 23:37:47 -04:00
bunnei
f1e9d5404d renderer_gl: Port over gl_shader_decompiler module from Citra. 2018-03-19 23:14:03 -04:00
bunnei
a533c3398c renderer_gl: Port over gl_rasterizer_cache module from Citra. 2018-03-19 23:14:03 -04:00
bunnei
ac51a39abf gl_resource_manager: Sync latest version with Citra. 2018-03-19 23:14:02 -04:00
bunnei
52bfc102bc renderer_gl: Port over gl_stream_buffer module from Citra. 2018-03-19 23:14:02 -04:00
bunnei
b1ceeb5c42 gl_state: Sync latest version with Citra. 2018-03-19 23:13:49 -04:00
Subv
3e645f5595 GPU: Added Z buffer registers to Maxwell3D's reg structure. 2018-03-19 16:55:33 -05:00
Subv
b942bfbb13 GPU: Added the render target (RT) registers to Maxwell3D's reg structure. 2018-03-19 16:46:29 -05:00
N00byKing
d3bdad2aaa Clang Fixes 2018-03-19 17:53:35 +01:00
N00byKing
1212e9e231 Clean Warnings (?) 2018-03-19 17:07:08 +01:00
Subv
c0f954906c GPU: Added the TSC registers to the Maxwell3D register structure. 2018-03-19 00:36:25 -05:00
Subv
f6e3d3aa1a GPU: Added the TIC registers to the Maxwell3D register structure. 2018-03-19 00:32:57 -05:00
Subv
36c527131f GPU: Implement macro 0xE1A BindTextureInfoBuffer in HLE. 
This macro simply sets the current CB_ADDRESS to the texture buffer address for the input shader stage.
 2018-03-18 19:03:40 -05:00
Subv
80b0f4d681 GPU: Implement the BindStorageBuffer macro method in HLE. 
This macro binds the SSBO Info Buffer as the current ConstBuffer.
This buffer is usually bound to c0 during shader execution.
Games seem to use this macro instead of directly writing the address for some reason.
 2018-03-18 16:50:42 -05:00
Subv
845415cc3d GPU: Handle writes to the CB_DATA method. 
Writing to this method will cause the written value to be stored in the currently-set ConstBuffer plus CB_POS.

This method is usually used to upload uniforms or other shader-visible data.
 2018-03-18 15:23:24 -05:00
Subv
46bbeeb54a GPU: Move the GPU's class constructor and destructors to a cpp file. 
This should reduce recompile times when editing the Maxwell3D register structure.
 2018-03-18 15:23:24 -05:00
Subv
a8cb6ba213 GPU: Store uploaded GPU macros and keep track of the number of method parameters. 2018-03-18 11:51:46 -05:00
Subv
29c026fae1 GPU: Macros are specific to the Maxwell3D engine, so handle them internally. 2018-03-18 11:51:45 -05:00
Subv
5979796df8 GPU: Renamed ShaderType to ShaderStage as that is less confusing. 2018-03-17 18:32:57 -05:00
Subv
7b48098c60 GPU: Store shader constbuffer bindings in the GPU state. 2018-03-17 18:32:57 -05:00
Subv
5f181aec24 GPU: Corrected some register offsets and removed superfluous macro registers. 2018-03-17 18:32:56 -05:00
Subv
8a5c0e873b GPU: Make the SetShader macro call do the same as the real macro's code. 
It'll now set the CB_SIZE, CB_ADDRESS and CB_BIND registers when it's called.

Presumably this SetShader function is binding the constant shader uniforms to buffer 1 (c1[]).
 2018-03-17 18:32:55 -05:00
Subv
e3e0625ff7 GPU: Corrected the parameter documentation for the SetShader macro call. 
Register 0xE24 is actually a macro that sets some shader parameters in the register structure.

Macros are uploaded to the GPU at startup and have their own ISA, we'll probably write an interpreter for this in the future.
 2018-03-17 13:55:42 -05:00
bunnei
bed06310f2 Merge pull request #242 from Subv/set_shader 
GPU: Handle the SetShader method call (0xE24) and store the shader config.
 2018-03-17 00:34:17 -04:00
Subv
c9850b0d3a GPU: Handle the SetShader method call (0xE24) and store the shader config. 2018-03-16 22:51:06 -05:00
Subv
dbade2db3e GPU: Added the vertex array registers. 2018-03-16 22:47:45 -05:00
bunnei
b849a04b2f Merge pull request #241 from Subv/gpu_method_call 
GPU: Process command mode 5 (IncreaseOnce) differently from other commands
 2018-03-16 22:28:22 -04:00
Subv
6796e37911 GPU: Process command mode 5 (IncreaseOnce) differently from other commands. 
Accumulate all arguments before calling the desired method.

Note: Maybe we should do the same for the NonIncreasing mode?
 2018-03-16 20:32:44 -05:00
Subv
3247b8f9dd GPU: Assert that we get a 0 CODE_ADDRESS register in the 3D engine. 
Shader address calculation depends on this value to some extent, we do not currently know what it being 0 entails.
 2018-03-16 19:24:41 -05:00
Subv
d468c046f9 GPU: Added Maxwell registers for Shader Program control. 2018-03-16 19:23:11 -05:00
Subv
083e494083 GPU: Intercept writes to the VERTEX_END_GL register. 
This is the register that gets written after a game calls DrawArrays().

We should collect all GPU state and draw using our graphics API here.
 2018-03-04 19:14:04 -05:00