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13660 commits 79 branches 8 tags 167 MiB
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586 commits

Author SHA1 Message Date
bunnei
082ba6fc64 Merge pull request #3379 from ReinUsesLisp/cbuf-offset 
shader/decode: Fix constant buffer offsets
 2020-02-14 13:22:53 -05:00
bunnei
5160900bec Merge pull request #3369 from ReinUsesLisp/shf 
shader/shift: Implement SHF
 2020-02-07 22:06:57 -05:00
ReinUsesLisp
389cb51a33 shader/decode: Fix constant buffer offsets 
Some instances were using cbuf34.offset instead of cbuf34.GetOffset().
This returned the an invalid offset. Address those instances and rename
offset to "shifted_offset" to avoid future bugs.
 2020-02-05 12:19:09 -03:00
bunnei
a683c3c57c Merge pull request #3357 from ReinUsesLisp/bfi-rc 
shader/bfi: Implement register-constant buffer variant
 2020-02-04 15:14:13 -05:00
bunnei
223e535f65 Merge pull request #3356 from ReinUsesLisp/fcmp 
shader/arithmetic: Implement FCMP
 2020-02-04 11:36:59 -05:00
bunnei
d02c1c1f75 Merge pull request #3337 from ReinUsesLisp/vulkan-staged 
yuzu: Implement Vulkan frontend
 2020-02-03 16:56:25 -05:00
ReinUsesLisp
4f5791e529 shader: Remove curly braces initializers on shared pointers 2020-02-01 22:52:10 -03:00
bunnei
1de7f0beeb Merge pull request #3282 from FernandoS27/indexed-samplers 
Partially implement Indexed samplers in general and specific code in GLSL
 2020-02-01 20:41:40 -05:00
ReinUsesLisp
62ab366971 shader/shift: Implement SHIFT_RIGHT_{IMM,R} 
Shifts a pair of registers to the right and returns the low register.
 2020-02-01 21:20:02 -03:00
ReinUsesLisp
0ff3ea3188 shader/shift: Implement SHF_LEFT_{IMM,R} 
Shifts a pair of registers to the left and returns the high register.
 2020-02-01 21:19:44 -03:00
bunnei
74aeae1ae7 Merge pull request #3347 from ReinUsesLisp/local-mem 
shader/memory: Implement LDL.S16, LDS.S16, STL.S16 and STS.S16
 2020-01-30 10:59:52 -05:00
ReinUsesLisp
1d17aca3f5 shader/other: Fix skips for SYNC and BRK 2020-01-29 17:53:11 -03:00
ReinUsesLisp
1c642262eb shader/other: Stub S2R LaneId 2020-01-29 17:53:11 -03:00
ReinUsesLisp
ca61e82f85 shader/bfi: Implement register-constant buffer variant 
It's the same as the variant that was implemented, but it takes the
operands from another source.
 2020-01-27 01:20:38 -03:00
ReinUsesLisp
098218ff4c shader/arithmetic: Implement FCMP 
Compares the third operand with zero, then selects between the first and
second.
 2020-01-27 01:15:44 -03:00
ReinUsesLisp
0d8f0ad3b3 shader/memory: Implement ATOM.ADD 
ATOM operates atomically on global memory. For now only add ATOM.ADD
since that's what was found in commercial games.

This asserts for ATOM.ADD.S32 (handling the others as unimplemented),
although ATOM.ADD.U32 shouldn't be any different.

This change forces us to change the default type on SPIR-V storage
buffers from float to uint. We could also alias the buffers, but it's
simpler for now to just use uint. While we are at it, abstract the code
to avoid repetition.
 2020-01-26 01:54:24 -03:00
Fernando Sahmkow
2e6a1b965d Shader_IR: Address feedback. 2020-01-25 09:04:59 -04:00
ReinUsesLisp
0340f04b84 shader/memory: Implement STL.S16 and STS.S16 2020-01-25 03:16:10 -03:00
ReinUsesLisp
edd5e604be shader/memory: Implement unaligned LDL.S16 and LDS.S16 2020-01-25 03:16:10 -03:00
ReinUsesLisp
851d3adc24 shader/memory: Move unaligned load/store to functions 2020-01-25 03:16:10 -03:00
ReinUsesLisp
cff97272d2 shader/memory: Implement LDL.S16 and LDS.S16 2020-01-25 03:15:55 -03:00
Fernando Sahmkow
26b5aa702d Shader_IR: Change name of TrackSampler function so it does not confuse with the type. 2020-01-24 16:44:48 -04:00
Fernando Sahmkow
8c800cf312 Shader_IR: Corrections, styling and extras. 2020-01-24 16:44:48 -04:00
Fernando Sahmkow
b6d3153e7e Shader_IR: Propagate bindless index into the GL compiler. 2020-01-24 16:44:47 -04:00
Fernando Sahmkow
c066e472b9 Shader_IR: Implement Injectable Custom Variables to the IR. 2020-01-24 16:43:31 -04:00
Fernando Sahmkow
123c7cf307 Shader_IR: deduce size of indexed samplers 2020-01-24 16:43:31 -04:00
Fernando Sahmkow
2b9a30d06b Shader_IR: Setup Indexed Samplers on the IR 2020-01-24 16:43:30 -04:00
Fernando Sahmkow
f93bff419e Shader_IR: Implement initial code for tracking indexed samplers. 2020-01-24 16:43:30 -04:00
Fernando Sahmkow
c0c5fa078b Shader_IR: Address Feedback 2020-01-24 16:43:30 -04:00
Fernando Sahmkow
5fb7881077 Shader_IR: Allow constant access of guest driver. 2020-01-24 16:43:30 -04:00
Fernando Sahmkow
c5fdcd7a2c Shader_IR: Address Feedback 2020-01-24 16:43:29 -04:00
Fernando Sahmkow
61d2053adb Shader_IR: Store Bound buffer on Shader Usage 2020-01-24 16:43:29 -04:00
Fernando Sahmkow
e9f3264c8d GPU: Implement guest driver profile and deduce texture handler sizes. 2020-01-24 16:43:29 -04:00
bunnei
0d6a9f7d6b Merge pull request #3273 from FernandoS27/txd-array 
Shader_IR: Implement TXD Array.
 2020-01-24 14:02:40 -05:00
ReinUsesLisp
c4fd02b47f shader/memory: Implement ATOMS.ADD.U32 2020-01-16 17:30:55 -03:00
Lioncash
a4792176ce control_flow: Silence -Wreorder warning for CFGRebuildState 
Organizes the initializer list in the same order that the variables
would actually be initialized in.
 2020-01-14 13:28:48 -05:00
bunnei
8f44846de6 Merge pull request #3287 from ReinUsesLisp/ldg-stg-16 
shader_ir/memory: Implement u16 and u8 for STG and LDG
 2020-01-14 09:57:08 -05:00
ReinUsesLisp
6d7d0e48ad shader_ir/texture: Simplify AOFFI code 2020-01-09 03:50:37 -03:00
ReinUsesLisp
5fbd305638 shader_ir/memory: Implement u16 and u8 for STG and LDG 
Using the same technique we used for u8 on LDG, implement u16.

In the case of STG, load memory and insert the value we want to set
into it with bitfieldInsert. Then set that value.
 2020-01-09 02:12:29 -03:00
bunnei
73900c4678 Merge pull request #3258 from FernandoS27/shader-amend 
Shader_IR: add the ability to amend code in the shader ir.
 2020-01-04 14:05:17 -05:00
Fernando Sahmkow
591d53e1c3 Shader_IR: Address Feedback 2020-01-04 14:40:57 -04:00
Fernando Sahmkow
501d87c82b Shader_IR: Implement TXD Array. 
This commit extends the compilation of TXD to support array samplers on
TXD.
 2020-01-04 13:28:02 -04:00
bunnei
0f250f4a1f Merge pull request #3239 from ReinUsesLisp/p2r 
shader/p2r: Implement P2R Pr
 2019-12-31 20:37:16 -05:00
Fernando Sahmkow
a4d446291d Shader_IR: add the ability to amend code in the shader ir. 
This commit introduces a mechanism by which shader IR code can be
amended and extended. This useful for track algorithms where certain
information can derived from before the track such as indexes to array
samplers.
 2019-12-30 15:31:48 -04:00
bunnei
9d254bf997 Merge pull request #3228 from ReinUsesLisp/ptp 
shader/texture: Implement AOFFI and PTP for TLD4 and TLD4S
 2019-12-26 21:43:44 -05:00
bunnei
eff6d1f5cd Merge pull request #3235 from ReinUsesLisp/ldg-u8 
shader/memory: Implement LDG.U8 and unaligned U8 loads
 2019-12-21 22:50:28 -05:00
ReinUsesLisp
dd6e7808f5 shader/p2r: Implement P2R Pr 
P2R dumps predicate or condition codes state to a register. This is
useful for unit testing.
 2019-12-20 18:02:41 -03:00
ReinUsesLisp
0544c7ebce shader/r2p: Refactor P2R to support P2R 2019-12-20 17:55:42 -03:00
bunnei
ffc32e4d7d Merge pull request #3234 from ReinUsesLisp/i2f-u8-selector 
shader/conversion: Implement byte selector in I2F
 2019-12-19 22:36:26 -05:00
ReinUsesLisp
18ae3212cc shader/memory: Implement LDG.U8 and unaligned U8 loads 
LDG can load single bytes instead of full integers or packs of integers.
These have the advantage of loading bytes that are not aligned to 4
bytes.

To emulate these this commit gets the byte being referenced (by doing
"address & 3" and then using that to extract the byte from the loaded
integer:

result = bitfieldExtract(loaded_integer, (address % 4) * 8, 8)
 2019-12-18 01:21:46 -03:00