[spirv] new castings for int8/int16/etc (#86)

This commit introduces extended support for low-precision integer casting (int8, int16) in the SPIR-V shader generation pipeline, improving compatibility and performance across both Android and PC platforms. Co-authored-by: CamilleLaVey <camillelavey99@gmail.com> Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/86 Co-authored-by: lizzie <lizzie@eden-emu.dev> Co-committed-by: lizzie <lizzie@eden-emu.dev>
2025-10-13 12:57:49 +00:00 · 2025-07-23 01:02:10 +02:00 · 2025-07-23 01:02:10 +02:00 · 7962c81738
commit 7962c81738
parent a974c5a29c
10 changed files with 178 additions and 2 deletions
--- a/src/shader_recompiler/backend/glasm/emit_glasm_convert.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_convert.cpp
@ -225,4 +225,28 @@ void EmitConvertF64U64(EmitContext& ctx, IR::Inst& inst, Register value) {
    Convert(ctx, inst, value, "F64", "U64", true);
 }

+void EmitConvertU16U32(EmitContext& ctx, IR::Inst& inst, Register value) {
+    Convert(ctx, inst, value, "U32", "U16", false);
+}
+
+void EmitConvertU32U16(EmitContext& ctx, IR::Inst& inst, Register value) {
+    Convert(ctx, inst, value, "U16", "U32", false);
+}
+
+void EmitConvertU8U32(EmitContext& ctx, IR::Inst& inst, Register value) {
+    Convert(ctx, inst, value, "U32", "U8", false);
+}
+
+void EmitConvertU32U8(EmitContext& ctx, IR::Inst& inst, Register value) {
+    Convert(ctx, inst, value, "U8", "U32", false);
+}
+
+void EmitConvertS32S8(EmitContext& ctx, IR::Inst& inst, Register value) {
+    Convert(ctx, inst, value, "S8", "S32", false);
+}
+
+void EmitConvertS32S16(EmitContext& ctx, IR::Inst& inst, Register value) {
+    Convert(ctx, inst, value, "S16", "S32", false);
+}
+
 } // namespace Shader::Backend::GLASM
--- a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h
@ -541,6 +541,12 @@ void EmitConvertF64U8(EmitContext& ctx, IR::Inst& inst, Register value);
 void EmitConvertF64U16(EmitContext& ctx, IR::Inst& inst, Register value);
 void EmitConvertF64U32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value);
 void EmitConvertF64U64(EmitContext& ctx, IR::Inst& inst, Register value);
+void EmitConvertU16U32(EmitContext& ctx, IR::Inst& inst, Register value);
+void EmitConvertU32U16(EmitContext& ctx, IR::Inst& inst, Register value);
+void EmitConvertU8U32(EmitContext& ctx, IR::Inst& inst, Register value);
+void EmitConvertU32U8(EmitContext& ctx, IR::Inst& inst, Register value);
+void EmitConvertS32S8(EmitContext& ctx, IR::Inst& inst, Register value);
+void EmitConvertS32S16(EmitContext& ctx, IR::Inst& inst, Register value);
 void EmitBindlessImageSampleImplicitLod(EmitContext&);
 void EmitBindlessImageSampleExplicitLod(EmitContext&);
 void EmitBindlessImageSampleDrefImplicitLod(EmitContext&);
--- a/src/shader_recompiler/backend/glsl/emit_glsl_convert.cpp
+++ b/src/shader_recompiler/backend/glsl/emit_glsl_convert.cpp
@ -68,6 +68,36 @@ void EmitConvertU32F16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::I
    NotImplemented();
 }

+void EmitConvertU16U32([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
+                       [[maybe_unused]] std::string_view value) {
+    NotImplemented();
+}
+
+void EmitConvertU32U16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
+                       [[maybe_unused]] std::string_view value) {
+    NotImplemented();
+}
+
+void EmitConvertU8U32([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
+                       [[maybe_unused]] std::string_view value) {
+    NotImplemented();
+}
+
+void EmitConvertU32U8([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
+                       [[maybe_unused]] std::string_view value) {
+    NotImplemented();
+}
+
+void EmitConvertS32S8([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
+                       [[maybe_unused]] std::string_view value) {
+    NotImplemented();
+}
+
+void EmitConvertS32S16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
+                       [[maybe_unused]] std::string_view value) {
+    NotImplemented();
+}
+
 void EmitConvertU32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value) {
    ctx.AddU32("{}=uint({});", inst, value);
 }
--- a/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h
+++ b/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h
@ -611,6 +611,12 @@ void EmitConvertF64U8(EmitContext& ctx, IR::Inst& inst, std::string_view value);
 void EmitConvertF64U16(EmitContext& ctx, IR::Inst& inst, std::string_view value);
 void EmitConvertF64U32(EmitContext& ctx, IR::Inst& inst, std::string_view value);
 void EmitConvertF64U64(EmitContext& ctx, IR::Inst& inst, std::string_view value);
+void EmitConvertU16U32(EmitContext& ctx, IR::Inst& inst, std::string_view value);
+void EmitConvertU32U16(EmitContext& ctx, IR::Inst& inst, std::string_view value);
+void EmitConvertU8U32(EmitContext& ctx, IR::Inst& inst, std::string_view value);
+void EmitConvertU32U8(EmitContext& ctx, IR::Inst& inst, std::string_view value);
+void EmitConvertS32S8(EmitContext& ctx, IR::Inst& inst, std::string_view value);
+void EmitConvertS32S16(EmitContext& ctx, IR::Inst& inst, std::string_view value);
 void EmitBindlessImageSampleImplicitLod(EmitContext&);
 void EmitBindlessImageSampleExplicitLod(EmitContext&);
 void EmitBindlessImageSampleDrefImplicitLod(EmitContext&);
--- a/src/shader_recompiler/backend/spirv/emit_spirv_convert.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_convert.cpp
@ -268,4 +268,53 @@ Id EmitConvertF64U64(EmitContext& ctx, Id value) {
    return ctx.OpConvertUToF(ctx.F64[1], value);
 }

+Id EmitConvertU16U32(EmitContext& ctx, Id value) {
+    if (ctx.profile.support_int16) {
+        return ctx.OpUConvert(ctx.U16, value);
+    } else {
+        return ctx.OpBitFieldUExtract(ctx.U32[1], value, ctx.u32_zero_value, ctx.Const(16u));
+    }
+}
+
+Id EmitConvertU32U16(EmitContext& ctx, Id value) {
+    if (ctx.profile.support_int16) {
+        return ctx.OpUConvert(ctx.U32[1], value);
+    } else {
+        return ExtractU16(ctx, value);
+    }
+}
+
+Id EmitConvertU8U32(EmitContext& ctx, Id value) {
+    if (ctx.profile.support_int8) {
+        return ctx.OpUConvert(ctx.U8, value);
+    } else {
+        return ExtractU8(ctx, value);
+    }
+}
+
+Id EmitConvertU32U8(EmitContext& ctx, Id value) {
+    if (ctx.profile.support_int8) {
+        return ctx.OpUConvert(ctx.U32[1], value);
+    } else {
+        return ctx.OpBitFieldUExtract(ctx.U32[1], value, ctx.u32_zero_value, ctx.Const(8u));
+    }
+}
+
+// in signed
+Id EmitConvertS32S8(EmitContext& ctx, Id value) {
+    if (ctx.profile.support_int8) {
+        return ctx.OpSConvert(ctx.U32[1], value);
+    } else {
+        return ctx.OpBitFieldSExtract(ctx.U32[1], value, ctx.u32_zero_value, ctx.Const(8u));
+    }
+}
+
+Id EmitConvertS32S16(EmitContext& ctx, Id value) {
+    if (ctx.profile.support_int16) {
+        return ctx.OpSConvert(ctx.U32[1], value);
+    } else {
+        return ctx.OpBitFieldSExtract(ctx.U32[1], value, ctx.u32_zero_value, ctx.Const(16u));
+    }
+}
+
 } // namespace Shader::Backend::SPIRV
--- a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
@ -503,6 +503,12 @@ Id EmitConvertF64U8(EmitContext& ctx, Id value);
 Id EmitConvertF64U16(EmitContext& ctx, Id value);
 Id EmitConvertF64U32(EmitContext& ctx, Id value);
 Id EmitConvertF64U64(EmitContext& ctx, Id value);
+Id EmitConvertU16U32(EmitContext& ctx, Id value);
+Id EmitConvertU32U16(EmitContext& ctx, Id value);
+Id EmitConvertU8U32(EmitContext& ctx, Id value);
+Id EmitConvertU32U8(EmitContext& ctx, Id value);
+Id EmitConvertS32S8(EmitContext& ctx, Id value);
+Id EmitConvertS32S16(EmitContext& ctx, Id value);
 Id EmitBindlessImageSampleImplicitLod(EmitContext&);
 Id EmitBindlessImageSampleExplicitLod(EmitContext&);
 Id EmitBindlessImageSampleDrefImplicitLod(EmitContext&);