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[vk, opengl] defer checks to topmost call (avoid unnecessary call) (#40)

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Co-authored-by: crueter <crueter@eden-emu.dev>
Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/40
Co-authored-by: lizzie <lizzie@eden-emu.dev>
Co-committed-by: lizzie <lizzie@eden-emu.dev>
This commit is contained in:
lizzie 2025-07-13 03:40:48 +02:00 • committed by crueter
parent 03351a4f8b
commit 5091759a47
Signed by: crueter
GPG key ID: 425ACD2D4830EBC6
4 changed files with 66 additions and 61 deletions
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5
src/video_core/gpu.h
View file

@ -1,3 +1,6 @@
// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
// SPDX-License-Identifier: GPL-3.0-or-later
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
// SPDX-License-Identifier: GPL-2.0-or-later
@ -244,7 +247,7 @@ public:
void InvalidateRegion(DAddr addr, u64 size);
/// Notify rasterizer that CPU is trying to write this area. It returns true if the area is
/// sensible, false otherwise
/// sensible, false otherwise, addr and size must be a valid combination
bool OnCPUWrite(DAddr addr, u64 size);
/// Notify rasterizer that any caches of the specified region should be flushed and invalidated

46
src/video_core/renderer_opengl/gl_rasterizer.cpp
View file

@ -1,3 +1,6 @@
// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
// SPDX-License-Identifier: GPL-3.0-or-later
// SPDX-FileCopyrightText: 2015 Citra Emulator Project
// SPDX-License-Identifier: GPL-2.0-or-later
@ -565,22 +568,17 @@ void RasterizerOpenGL::InvalidateRegion(DAddr addr, u64 size, VideoCommon::Cache
bool RasterizerOpenGL::OnCPUWrite(DAddr addr, u64 size) {
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
if (addr == 0 || size == 0) {
return false;
}
DEBUG_ASSERT(addr != 0 || size != 0);
{
std::scoped_lock lock{buffer_cache.mutex};
if (buffer_cache.OnCPUWrite(addr, size)) {
return true;
}
}
{
std::scoped_lock lock{texture_cache.mutex};
texture_cache.WriteMemory(addr, size);
}
shader_cache.InvalidateRegion(addr, size);
return false;
}
@ -1204,24 +1202,24 @@ void RasterizerOpenGL::SyncLogicOpState() {
}
flags[Dirty::LogicOp] = false;
auto& regs = maxwell3d->regs;
if (device.IsAmd()) {
using namespace Tegra::Engines;
struct In {
const Maxwell3D::Regs::VertexAttribute::Type d;
In(Maxwell3D::Regs::VertexAttribute::Type n) : d(n) {}
bool operator()(Maxwell3D::Regs::VertexAttribute n) const {
return n.type == d;
}
};
bool has_float =
std::any_of(regs.vertex_attrib_format.begin(), regs.vertex_attrib_format.end(),
In(Maxwell3D::Regs::VertexAttribute::Type::Float));
regs.logic_op.enable = static_cast<u32>(!has_float);
}
auto& regs = maxwell3d->regs;
if (device.IsAmd()) {
using namespace Tegra::Engines;
struct In {
const Maxwell3D::Regs::VertexAttribute::Type d;
In(Maxwell3D::Regs::VertexAttribute::Type n) : d(n) {}
bool operator()(Maxwell3D::Regs::VertexAttribute n) const {
return n.type == d;
}
};
bool has_float =
std::any_of(regs.vertex_attrib_format.begin(), regs.vertex_attrib_format.end(),
In(Maxwell3D::Regs::VertexAttribute::Type::Float));
regs.logic_op.enable = static_cast<u32>(!has_float);
}
if (regs.logic_op.enable) {
glEnable(GL_COLOR_LOGIC_OP);
glLogicOp(MaxwellToGL::LogicOp(regs.logic_op.op));

7
src/video_core/renderer_vulkan/vk_rasterizer.cpp
View file

@ -636,22 +636,17 @@ void RasterizerVulkan::InnerInvalidation(std::span<const std::pair<DAddr, std::s
}
bool RasterizerVulkan::OnCPUWrite(DAddr addr, u64 size) {
if (addr == 0 || size == 0) {
return false;
}
DEBUG_ASSERT(addr != 0 || size != 0);
{
std::scoped_lock lock{buffer_cache.mutex};
if (buffer_cache.OnCPUWrite(addr, size)) {
return true;
}
}
{
std::scoped_lock lock{texture_cache.mutex};
texture_cache.WriteMemory(addr, size);
}
pipeline_cache.InvalidateRegion(addr, size);
return false;
}